发明名称 |
Three input arithmetic logic unit with shifter and mask generator |
摘要 |
A three input arithmetic logic unit (230) generates a combination of the three inputs that is selected by a function signal. The second input signal comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2N, with N being the shift amount. The output of the shift (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239). One preferred form of the mask has a number of right justified 1's corresponding to a mask input signal. This mask input signal may be the default shift amount or a predetermined number of the least significant bits of the third input signal as selected by a multiplexer. A second preferred form of the mask is selected one of the left most 1, the right most 1, the left most bit change or the right most bit change of a predetermined set of the least significant bits of data recalled from a data register.
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申请公布号 |
US5974539(A) |
申请公布日期 |
1999.10.26 |
申请号 |
US19930160298 |
申请日期 |
1993.11.30 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
GUTTAG, KARL M.;BALMER, KEITH;GOVE, ROBERT J.;READ, CHRISTOPHER J.;GOLSTON, JEREMIAH E.;POLAND, SYDNEY W.;ING-SIMMONS, NICHOLAS;MOYSE, PHILLIP |
分类号 |
G06F5/01;(IPC1-7):G06F9/302;G06F9/315 |
主分类号 |
G06F5/01 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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