发明名称 High voltage protection for an integrated circuit input buffer
摘要 Connection of a reference voltage to an inverter of an input buffer is controlled to protect the buffer from damage due to high voltage connected to the buffer so that the inverter is isolated from the reference voltage for application of the high voltage. A supply voltage may be connected to the inverter to ensure the output state of the buffer when the inverter is isolated from the reference voltage. In particular, an input buffer including an inverter having at least one p-channel and at least two n-channel transistors connected in series between a supply voltage and a reference voltage is protected from damage due to high voltage by floating the source and drain of n-channel transistors connected to receive input signals to be buffered. A control signal indicating a high voltage is connected to the buffer turns off the last n-channel transistor in the series chain of transistors and thereby removes the reference voltage from any remaining n-channel transistors in the chain. To ensure the state of the output of the buffer circuit while the n-channel transistors are thus isolated or floating, the drain of the first n-channel transistor in the series chain of transistors is clamped to the supply voltage. A p-channel transistor is connected between the drain of the first n-channel transistor in the chain and the supply voltage to provide the supply voltage clamp in response to the control signal.
申请公布号 US5973900(A) 申请公布日期 1999.10.26
申请号 US19970961781 申请日期 1997.10.31
申请人 MICRON TECHNOLOGY, INC. 发明人 SHER, JOSEPH C.
分类号 G11C7/10;H03K19/003;(IPC1-7):H02H3/20 主分类号 G11C7/10
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