| 摘要 |
<p>A radar signal processor for use in a pulse radar system. Reception signals are given from a range divide and output circuit to a plurality of integration point variable coherent integrators, each of which is allocated to a different range domain. The range domain is given to an integration point setting section provided corresponding to each integration point variable coherent integrator. The integration point setting section determines the number of coherent integration points based on the given range domain and sets it in the corresponding integration point variable coherent integrator. The signal resulting from coherent integration by the integration point variable coherent integrator is discriminated to frequencies, then supplied to any square detector for square detection for each frequency component. Square detection output is fed into a CFAR detector, which then makes its false alarm rate constant for a supply to a display, etc.</p> |
