| 摘要 |
A three dimensional ferroelectric memory device formed on a semiconductor substrate has insulative material formed between rows of conductors to reduce cross talk between the conductors. Access circuitry or other circuitry is formed beneath the three dimensional structure. Continuous conductors, or staggered vias provide for connection to conductors forming the memory cells. An access circuit is provided which eliminates the need for an access transistor for each memory cell by using a memory cell with a reference cell in combination with sensing circuitry. Read cycles are followed by write cycles and an equilibrate cycle to reverse the effects of destructive reads on the memory cells. Side by side memory structures provide the ability to access using either a folded or open bit line circuit.
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