发明名称 Comparator circuit
摘要 In a comparator circuit comprised of a feedback amplifier and a differential amplifier AMP1, the feedback amplifier includes input transistors Tr1 to Tr4. Gates of the transistors Tr1 and Tr2 are respectively inputted with first and second inverted inputs, and gates of the transistors Tr3 and Tr4 are inputted with first and second non-inverted inputs. First ends of current paths of the transistors Tr3 and Tr4 are connected in common, and ends of current paths of transistors Tr1 and Tr2 are connected in common. Second ends of the current paths of the transistors Tr1 to Tr4 are connected in common to a constant current source. The first and second inverted inputs are supplied with a reference voltage, and the first and second non-inverted inputs are respectively supplied with the non-inverted and inverted outputs of the differential amplifier AMP1. A signal from a connection point common to the first ends of the current paths of the transistors Tr3 and Tr4 is supplied as a feedback output to the differential amplifier AMP1 to control operation of the differential amplifier AMP1. The timing when feedback is performed to stabilize the operating point of the differential amplifier AMP1 is the timing when the non-inverted and inverted outputs of the differential amplifier AMP1 have a small potential difference therebetween or are substantially equal to each other.
申请公布号 US5969546(A) 申请公布日期 1999.10.19
申请号 US19980055900 申请日期 1998.04.07
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HAMANISHI, NAOYUKI;ODA, KAZUHIRO
分类号 H03K5/08;H03F3/45;H03K5/24;(IPC1-7):H03K5/22 主分类号 H03K5/08
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