Static semiconductor memory device having active mode and sleep mode

摘要

A power supply control circuit of an SRAM cuts off supply of power supply voltage to any component other than memory cells and a word line potential fix circuit in a sleep period in which only retention of data is carried out. The word line potential fix circuit fixes a word line at a non-selection level in the sleep period. The potential on the word line never becomes unstable in the sleep period so that data in the memory cell is never destroyed. Accordingly, a static semiconductor memory device consuming less power and having a high data retention ability can be provided.