发明名称 METHOD AND DEVICE FOR ANALYZING FAILURE IN SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To sensitively analyze the rear surface with a high resolution by minimizing a special tool, by analyzing the rear surface of many kinds of integrated circuits by a common tool, by reducing analysis costs and time required for the analysis, by supplying power to a thinly polished chip, and by using a high-resolution objective lens. SOLUTION: A semiconductor chip 5 is fitted to an electrode 4 in a flip-chip system, an electrode 2 around a substrate is subjected to probing, an integrated circuit is driven, and failure is detected from the rear surface of the semiconductor chip 5. The rear surface of the semiconductor chip 5 can be analyzed from the same side as the probing, thus analyzing the rear surface in a normal stage 8. The arrangement of the electrode 2 around the substrate is standardized, thus performing the probing to the semiconductor chip with different dimensions by the same probe card.</p>
申请公布号 JPH11287840(A) 申请公布日期 1999.10.19
申请号 JP19980088625 申请日期 1998.04.01
申请人 NEC CORP 发明人 KITAHATA HIDEKI
分类号 G01R31/26;H01L21/66;(IPC1-7):G01R31/26 主分类号 G01R31/26
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