发明名称 Voltage multiplier circuit and nonvolatile semiconductor memory device having voltage multiplier circuit
摘要 A voltage multiplier circuit for raising an input voltage to a predetermined voltage is characterized in that a plurality of multiplier cells for raising an input voltage to be outputted, and a connection switching circuit for switching a connection state of these multiplier cells are provided, and the connection switching circuit connects multiplier cell groups formed by connecting one or a plurality of the multiplier cells, in parallel to an output, and varies the number of the multiplier cells of the multiplier cell groups and that of the multiplier cell groups.
申请公布号 US5969988(A) 申请公布日期 1999.10.19
申请号 US19960598071 申请日期 1996.02.07
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TANZAWA, TORU;TANAKA, TOMOHARU;NAKAMURA, HIROSHI;TANAKA, YOSHIYUKI
分类号 G11C17/00;G05F1/00;G11C5/14;G11C16/06;G11C16/30;H02M3/07;(IPC1-7):G11C16/06 主分类号 G11C17/00
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