发明名称 |
Apparatus including a host processor and communications adapters interconnected with a bus, with improved transfer of interrupts between the adapters and host processor |
摘要 |
A pair of communications adapters each include a number of digital signal processors and network interface circuits for the attachment of a multi-channel telephone line. A bus connecting the communications adapters can carry data between a network line attached to one of the adapters and the digital signal processors of the other adapter. The digital signal processors on each card are connected to a host, or controller, processor. Each digital signal processor interrupts its host processor by transmitting an interrupt control block as data to a data memory of the host processor, and by subsequently sending an interrupt causing the host processor to examine the data memory. Preferably, the interrupt control block includes data representing a number of requested interrupts.
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申请公布号 |
US5968158(A) |
申请公布日期 |
1999.10.19 |
申请号 |
US19970944209 |
申请日期 |
1997.10.06 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ANDREWS, LAWRENCE P.;BECKMAN, RICHARD CLYDE;ENG, ROBERT CHIH-TSIN;LINGER, JUDITH MARIE;PETTY, JR., JOSEPH C.;SINIBALDI, JOHN CLAUDE;TURBEVILLE, GARY L.;WILLIAMS, KEVIN BRADLEY |
分类号 |
G06F15/16;G06F13/00;G06F13/24;G06F15/177;H04L12/66;(IPC1-7):G06F9/46 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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