发明名称 Division circuit and the division method thereof
摘要 A division method and circuit performs a division for signed data by adding or subtracting a divisor to or from the dividend or the partial remainder from the division, according to the sign of the divisor or the dividend and the partial remainder to acquire a new partial remainder. The division is repeated a predetermined number of times in which a quotient bit is acquired according to the sign of the acquired partial remainder or the divisor. The dividend is corrected by subtracting 1, which is the significance of an LSB of the corresponding dividend, from the dividend when the sign of the dividend is negative, and the corrected dividend is used for the division processing.
申请公布号 US5969976(A) 申请公布日期 1999.10.19
申请号 US19970948793 申请日期 1997.10.10
申请人 HITACHI, LTD.;HITACHI VLSI ENGINEERING CORP.;HITACHI MICROCOMPUTER SYSTEM LTD. 发明人 KAWASAKI, SHUMPEI;SAKAKIBARA, EIJI;FUKADA, KAORU;YAMAZAKI, TAKANAGA;AKAO, YASUSHI;BABA, SHIRO;KIHARA, TOSHIMASA;KURAKAZU, KEIICHI;TSUKAMOTO, TAKASHI;MASUMURA, SHIGEKI;TAWARA, YASUHIRO;KASHIWAGI, YUGO;FUJITA, SHUYA;ISHIDA, KATSUHIKO;SAWA, NORIKO;ASANO, YOICHI;CHAKI, HIDEAKI;SUGAWARA, TADAHIKO;KAINAGA, MASAHIRO;NOGUCHI, KOUKI;WATABE, MITSURU
分类号 G06F7/537;G06F7/483;G06F7/52;G06F7/527;G06F7/535;G06F9/28;G06F9/30;G06F9/302;G06F9/305;G06F9/318;G06F9/32;G06F9/38;(IPC1-7):G06F7/52 主分类号 G06F7/537
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