| 摘要 |
<p>PROBLEM TO BE SOLVED: To construct various systems by utilizing unused memory space. SOLUTION: This array is provided with a counter 5, which generates an address signal that accesses an address of a nonvolatile memory 2 and a control circuit 14 which stores data that form an interface area, where a device formed in a base cell area temporarily stores data from the memory 2 and an area where a read control signal is generated in the base cell area in 1st address space from the leading address to a prescribed address of the memory 2, stores data to be transferred to the interface area in a 2nd address space after the prescribed address, downloads data in the 1st address space to a base cell area region of an FPGA when power is on, reads data from the 2nd address space based on the value of the counter and the read control signal after downloading, and sends it to the interface area.</p> |
