发明名称 VIDEO ENCODER/DECODER
摘要 <p>PURPOSE: To perform AV synchronization control with high accuracy regardless of the execution/non-execution of frame rate conversion by checking AV synchronization by a synchronization check timing signal generated in replying to a system clock. CONSTITUTION: A video timing control part 3 generates a display timing signal TH replying to the supply of a video synchronizing signal Y, and supplies it to a picture code part 6, and also, generates a decode timing signal TD, and supplies it to a decode control part 4 and a frame conversion control part 2A. The check signal generation circuit 20 of the frame conversion control part 2A generates a synchronization check timing signal TC representing a decoding timing in the case that no frame conversion is performed according to the frame rate of video code data DV in replying to the supply of the system clock SC, and supplies it to an AV synchronization control part 1A. The check circuit 11 of the AV synchronization control part 1A checks the AV synchronization in replying to the supply of the synchronization check timing signal TC after a decoding start timing.</p>
申请公布号 JPH08322043(A) 申请公布日期 1996.12.03
申请号 JP19950126459 申请日期 1995.05.25
申请人 NEC CORP 发明人 KITSUKI TOSHIAKI
分类号 H04N19/132;H03M7/00;H04N7/01;H04N7/24;H04N19/00;H04N19/134;H04N19/196;H04N19/423;H04N19/44;H04N19/587;H04N19/59;H04N19/70;(IPC1-7):H04N7/24 主分类号 H04N19/132
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