发明名称 MICROCOMPUTER, ELECTRONIC EQUIPMENT AND DEBUG SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a microcomputer, electronic equipment and a debug system that have a fewer terminal needed only at the time of debug of terminals and the like in order to input a forced brake on a mass-production chip. SOLUTION: This device is a microcomputer 10 that has a user mode and a debug mode. An SIOD 16 functions as a terminal for inputting an input signal of a forced brake at the time of a user mode and functions as a terminal for performing transmission and reception of debug information at the time of the debug mode. Also, when an external debug tool 14 is not connected, the SIOD is pulled up and held at a high level, and is constituted so that it can be at an arbitrary level (a high level or low level) by connecting it to the debug tool 14. Then, an execution mode at the time of reset is decided on the basis of whether the SIOD 16 is at the high level or the low level.
申请公布号 JPH11282719(A) 申请公布日期 1999.10.15
申请号 JP19980103720 申请日期 1998.03.31
申请人 SEIKO EPSON CORP 发明人 HIJIKATA YOICHI
分类号 G06F11/22;G06F11/28;G06F15/78 主分类号 G06F11/22
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