| 摘要 |
PROBLEM TO BE SOLVED: To improve the rate of failure detection and the rate of design failure detection and to improve test efficiency, by shortening a test pattern by performing the setting of logical state and observation associated with a test on as many nodes of a user circuit to be tested as possible, white suppressing reduction in the degree of integration due to increase in the number of test circuits. SOLUTION: By providing an input-side multiplexer with a multiplexer M3 as well as a multiplexer M1 to be a multiplexer of three inputs and alternative selection, it is possible to observe a user circuit by a TSDI. Furthermore, by providing a boundary scan register with a circuit for a signal TSDO to output a signal SDO to be outputted to a next another boundary scan register to a node in the user circuit, it is possible to set the logical state of the user circuit. |
