发明名称 MULTI-FRAME PHASE-MATCHING CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To attain phase-matching with a simple configuration, without needing a special signal for identifying a frame number. SOLUTION: Frame synchronization means 3, 4 establish frame synchronization of 1st and 2nd input signals, whose head phase of multi-frame differs. Storage means 9, 10 store a multi-frame of the 1st or 2nd input signal read in the same frame phase as a clock signal. Comparators 25, 26 compare both signals, resulting from sampling the 1st read input signal at an n-frame period and resulting from sampling the 2nd input signal for a frame period, and compare both signals, similarly resulting from sampling the 1st read input signal at a frame period and resulting from sampling the 2nd input signal for a frame period. A control means 29 delays the 2nd signal based on the matching result of the comparator 26 and provides an output, when the 1st signal is delayed more than the 2nd signal and delays the 1st signal, based on the matching result of the comparator 25 and provides an output.</p>
申请公布号 JPH10145320(A) 申请公布日期 1998.05.29
申请号 JP19960318715 申请日期 1996.11.13
申请人 NEC ENG LTD 发明人 KIKUCHI TOSHIAKI;YANAGAWA YOSHIKATSU;TANIMOTO HARUHIKO
分类号 H04J3/06;H04L7/00;(IPC1-7):H04J3/06 主分类号 H04J3/06
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