Semiconductor memory device having hierarchical word line structure

摘要

Conductive lines for electrostatic shielding including at least one signal line are arranged between a global data I/O bus line and a ground line transmitting a ground voltage to a nonselected word line through a sub-decoder. Capacitive coupling between bus lines included in the global data I/O bus and the ground line is suppressed, and floating up of a ground voltage on the nonselected word line is prevented.