| 摘要 |
A new structure of a non-volatile semiconductor memory cell array and a method of fabricating the memory arrays. The circuit layout of the memory array not only comprises of the conventional floating gates, control gates, cell sources and cell drains, but also adds the local source regions to increase the coupling ratio. Besides, the new design can reduce the number of metal contact windows, further increase the packing density of the memory array. Furthermore, an additional isolation region is formed between two bit lines so as to increase the distance between two bit lines, which can minimize the possibility of cross talk due to shirking spacing.
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