发明名称 Two-dimensional IDCT circuit with input adder out output shifter for reducing addition operations during rounding-up
摘要 The invention provides a high speed two-dimensional discrete cosine transform circuit which can reduce the number of addition operations for rounding to one time. The two-dimensional IDCT circuit calculates MxN-point two-dimensional inverse discrete cosine transforms wherein MxN is equal to 22n, and includes an MxN two-dimensional IDCT operator for calculating two-dimensional inverse discrete cosine transforms as matrix vector products of a transform matrix of MN rows and MN columns and MNth-order input vectors, a shift operator for shifting results of the calculation of the MxN two-dimensional IDCT operator rightwardly, and an adder for adding 2n-2 to a discrete cosine coefficient from among discrete cosine transform coefficients to be inputted to the MxN two-dimensional IDCT operator. An output signal of the shift operator is outputted as a circuit output signal of the two-dimensional IDCT circuit.
申请公布号 US5964824(A) 申请公布日期 1999.10.12
申请号 US19970791984 申请日期 1997.01.31
申请人 NEC COPORATION 发明人 MURATA, ERI;KURODA, ICHIRO
分类号 H04N7/30;G06F17/14;H04N1/41;(IPC1-7):G06F17/14 主分类号 H04N7/30
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