发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To hold high sub-threshold characteristic and suppress depletion capacitance of an electrode structure and reduce a junction leak current even when, in a semiconductor device, alignment precision is mitigated and a slight misalignment occurs at a position where the electrode structure is formed. SOLUTION: Wet-etching is performed on a silicon oxide film 21 on a substrate 1. At this time, the silicon oxide film 21 is equivalently etched and conditions of an etching time, etc., are adjusted, whereby a central part 22a which is band-shaped having a predetermined width is the thickest, and as going apart to a width direction, it is thinned gradually, thereby forming a mask 22 of a shape having an almost constant film thickness. Ions are implanted to the substrate 1 using this mask 22 and a well is formed imitating a shape of the mask 22.
申请公布号 JPH11274491(A) 申请公布日期 1999.10.08
申请号 JP19980092630 申请日期 1998.03.20
申请人 NIPPON FOUNDRY INC 发明人 TAKI MASUYUKI
分类号 H01L21/8247;H01L21/266;H01L21/8238;H01L21/8242;H01L27/092;H01L27/108;H01L27/115;H01L29/78;H01L29/788;H01L29/792 主分类号 H01L21/8247
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