发明名称 METHOD FOR OPERATING SUPERSCALAR PROCESSOR AND CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To realize the high ability inference processing of composite loading/ storage instructions by sequentially issuing basic instructions so that data is moved between a data cache and a renaming register file. SOLUTION: A sequencer unit 18 selectively dispatches an instruction to a selected unit among execution units 20, 22, 24, 26, 28 and 30 through a dispatch unit 46 in response to an instruction inputted from an instruction cache 14. The respective execution units execute one or a plurality of instructions in a specified instruction class. LSU 28 inputs information from a data cache 16 in response to a loading instruction and copies such information to the selected buffer in renaming buffers 34 and 38. LSU 28 inputs information from one of selected GPR 32 and FPR 36 in response to the storage instruction and copies such information to the data cache 16 or a memory 39.
申请公布号 JPH11272467(A) 申请公布日期 1999.10.08
申请号 JP19990032373 申请日期 1999.02.10
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 DAVID SCOTT RAY;KEVIN ARTHUR CHIAROTTO;DAVID ANDREW SHROETER;A JAMES VAN NORSTLAND JR;WILLIAMSON BARRY DUANE
分类号 G06F9/30;G06F9/312;G06F9/318;G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/30
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