| 摘要 |
A class D amplifier utilizing first and second switches connected in series to conduct current from a power source in a sequential manner. The switches have a common output node between them. A pulse width modulator is utilized to produce first and second signals identified as the high and low side. The first switch connects to a drive which receives the first signal from the pulse width modulator to close the first switch. A second switch drive receives a second signal from the pulse width modulator to operate the second switch in a sequential manner. A toggle or commutator device utilizes third and fourth switches in series with an inductor. The toggle device is connected to the common node between the first and second switches in order to closely control the switching of the first and second switches to eliminate loss of energy associated with the rapid switching normally found in a class D amplifier.
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