发明名称 |
Large scale integrated circuit having functional blocks controlled with clock signals that conduct setting operations at different times |
摘要 |
An LSIC includes a clock distributor circuit capable of decreasing the power consumption and suppressing the deviation of the power source potential and the transient current. The circuit includes a plurality of functional blocks including CPU. The CPU conducts a data accessing operation via address and data buses to peripheral blocks. There is also provided a clock supply unit to supply clock signals in which at least one of the clock signals has a phase different from those of the remaining clock signals and the clock signals do not accomplish the setting operation at the same time.
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申请公布号 |
US5963075(A) |
申请公布日期 |
1999.10.05 |
申请号 |
US19970914091 |
申请日期 |
1997.08.19 |
申请人 |
NEC CORPORATION |
发明人 |
HIIRAGIZAWA, YASUNORI |
分类号 |
G06F1/06;G06F1/10;H03K19/0175;(IPC1-7):H03K1/04 |
主分类号 |
G06F1/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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