发明名称 Data processor and data processing system
摘要 A data processor has a ROM that holds a boot program for causing the CPU to transfer a debug program from a serial interface circuit to a debug-use RAM area. When supplied externally with an SDI boot command, the serial interface circuit outputs an SDI interrupt request signal (SDI-boot) to an interrupt controller. The signal causes the CPU to execute the boot program. Debug operations are varied as per the contents of the downloaded debug program, and data exchanges upon debugging are carried out serially.
申请公布号 US5961641(A) 申请公布日期 1999.10.05
申请号 US19970864970 申请日期 1997.05.29
申请人 HITACHI, LTD. 发明人 HASEGAWA, HIRONOBU;SASAKI, HIROYUKI;URAGUCHI, MASAHIKO
分类号 G06F11/28;G06F11/22;G06F11/36;G06F13/38;G06F15/78;(IPC1-7):G06F15/177 主分类号 G06F11/28
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