发明名称
摘要 <p>The present invention provides a multiprocessor ATM exchange which permits an ATM exchange to be configured with multiple processors to provide high capacity. The CLP state management section of the common signaling processor collects load state information from the CLP load monitoring section of call control processors to manage the load state thereof, and manages the normal or abnormal state of the call control processors. The signal floating function section, when receiving an initial address message, selects a call control processor suitable for processing said call based on the contents of the CLP state management section. On receiving the initial address message, the B-ISUP body of a selected call control processor generates an origination signal identifier from an incoming internal call reference number and the clp number of the call control processor and appends the signal identifier to the signal to send it.</p>
申请公布号 JP2956638(B2) 申请公布日期 1999.10.04
申请号 JP19970034177 申请日期 1997.02.19
申请人 NIPPON DENKI KK 发明人 MASUDA SHINJI
分类号 H04Q3/00;H04L12/70;H04L12/713;H04L12/931;H04Q11/04;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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