| 摘要 |
A display driver circuit (1100) includes a word line sequencer for providing a series of row addresses, and a row decoder (504) for decoding each of the row addresses and asserting write signals on corresponding ones of a plurality of output terminals. An optional data path sequencer (802) provides a series of path addresses which are used by an optional data router (804) to route data to particular sub-rows of display (1102). Additionally, an optional sub-row sequencer (1106) provides a series of sub-row addresses to an optional sub-row decoder (1108), which decodes each of the sub-row addresses and asserts write signals on corresponding ones of a second plurality of output terminals. In various embodiments, the row sequencer (506), the sub-row sequencer (1106), and/or the data path sequencer (802) is/are responsive to data load instructions from a system, such that no Array Write commands are required to write data to a display (1102).
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