发明名称 SIGNAL LEVEL MONITORING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To make accurately effectively regulable gain and offset voltage by only one time simple regulating procedure in a signal level monitoring circuit for outputting a voltage or current corresponding to the level of an input signal. SOLUTION: The signal level monitoring circuit comprises a first amplifying circuit 1-21 for outputting a predetermined level value v1 according to a regulation of an offset regulating voltage Vr when a voltage vi input from a monitoring detector 1-1 is a predetermined reference level, a second amplifying circuit 1-22 for setting an arbitrary gain, and a third amplifying circuit for outputting a predetermined monitoring output voltage vo according to a regulation of an offset regulation voltage Vof irrespective of the gain of the second amplifying circuit when the voltage vi is at the predetermined reference level.
申请公布号 JPH11264842(A) 申请公布日期 1999.09.28
申请号 JP19980068150 申请日期 1998.03.18
申请人 FUJITSU LTD 发明人 UEDA TOMIO
分类号 G01R15/08;G01R19/00;G01R21/12;H03G3/30;H04B17/00 主分类号 G01R15/08
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