发明名称 Emulation system with time-multiplexed interconnect
摘要 A hardware emulation system is disclosed which reduces hardware cost by time-multiplexing multiple design signals onto physical logic chip pins and printed circuit board. The reconfigurable logic system of the present invention comprises a plurality of reprogrammable logic devices, and a plurality of reprogrammable interconnect devices. The logic devices and interconnect devices are interconnected together such that multiple design signals share common I/O pins and circuit board traces. A logic analyzer for a hardware emulation system is also disclosed. The logic circuits necessary for executing logic analyzer functions is programmed into the programmable resources in the logic chips of the emulation system.
申请公布号 US5960191(A) 申请公布日期 1999.09.28
申请号 US19970865741 申请日期 1997.05.30
申请人 QUICKTURN DESIGN SYSTEMS, INC. 发明人 SAMPLE, STEPHEN P.;BERSHTEYN, MIKHAIL;BUTTS, MICHAEL R.;BAUER, JERRY R.
分类号 G01R31/28;G01R31/317;G06F11/22;G06F11/26;G06F17/50;(IPC1-7):G06F9/455 主分类号 G01R31/28
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