发明名称 |
Decoder circuit with short channel depletion transistors |
摘要 |
A decoder circuit formed on an integrated circuit substrate including at least one short channel depletion transistor having a low resistance path formed between the source and the drain regions. The low resistance path is provided by an implant into the channel region that forms a depletion channel wherein the channel region has a length less than a length of a channel region of transistors in the decoder circuit that handle input/output voltage levels for the decoder circuit.
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申请公布号 |
US5959336(A) |
申请公布日期 |
1999.09.28 |
申请号 |
US19960702846 |
申请日期 |
1996.08.26 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
BARSAN, RADU M. |
分类号 |
(IPC1-7):H07L29/78 |
主分类号 |
(IPC1-7):H07L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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