发明名称 Circuits and methods for framing one or more data streams
摘要 A circuit and method for framing an input data stream to a periodic signal. The circuit comprises a register circuit, a logic circuit and a multiplexor circuit. The register circuit may be configured to store information and to present a first and second output in response to (i) the input data stream and (ii) the periodic signal. The logic circuit may be configured to (i) detect a predetermined bit sequence and (ii) present a control signal in response to the information stored in the register circuit. The multiplexor circuit may be configured to present one or more multiplexed signals comprising the first and second outputs of the register circuit in response to the control signal.
申请公布号 US5960007(A) 申请公布日期 1999.09.28
申请号 US19970975644 申请日期 1997.11.21
申请人 CYPRESS SEMICONDUCTOR CORP. 发明人 GRIVNA, EDWARD L.
分类号 G06F7/76;H04L7/04;H04N7/52;H04N7/56;(IPC1-7):H04J3/06 主分类号 G06F7/76
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