| 摘要 |
PROBLEM TO BE SOLVED: To optimize the memory constitution and arrangement by allowing the memory to include plural word lines, plural bit lines intersecting with them and plural memory cells respectively corresponding to the intersections of the word lines and the bit lines and generating a control reference signal of plural memory blocks to keep the aspect ratio of chips to a specific value. SOLUTION: At the time of manufacturing a 128-Mbit DRAM, the aspect ratio of chips is kept to be roughly 1:2. 8 memory blocks are respectively arranged in 8 areas other than the area of the second row and the second column among the areas in which the main surface of a semiconductor substrate 1100 is divided into three rows and three columns. The area of the second row and the second column includes a master control circuit MCTL1 generating a reference signal becoming the references of controls of the all 8 memory blocks and local control circuits LC11 to LC22 which are arranged at four corners of the area of the second row and the second column and receive the reference signal from the master control circuit MCTL1 and transmit it to the respective memory blocks. Moreover, data busses DB4 are arranged in either of the central area CRL1 or the central area CRL2 of the semiconductor substrate. |
