| 摘要 |
PROBLEM TO BE SOLVED: To obtain an apparatus and a method, for verification of an integrated circuit, in which the operation of a bridge LSI can be verified when an error is generated in a bus or the like in a data transfer operation. SOLUTION: An error data generator 4A adds error information to a test pattern. A decoding control part 11 supplies the kind of an error to an error control part 12. The error control part 12 generates an error properly, and it outputs a signal at an L-level. An AND circuit 15 always outputs a signal at the L-level when the level of a signal from the error control part 12 is at the L-level, and, when the level is at an H-level, it outputs the comparison result of a data comparison part 14. A log output part 16 outputs a message to the effect that an operation is normal when the level of the signal from the AND circuit 15 is at the L-level, and it outputs a message to the effect that an error is generated when the level is at the H-level. |
