发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To reduce a structuring area and realize high integration density by supplying a first voltage, impressing a selection signal consisting of the first voltage to a word line, setting a second voltage which is lower than the first voltage as much as the predetermined voltage and then applying the first signal consisting of the second voltage or a third voltage signal lower than the second voltage to the selected bit line. SOLUTION: When a program voltage VppH is impressed to a drain D, a program voltage VppL is output from the source. The program voltage VppH supplies a voltage required for turning on the select transistors STr1, STr2. An X decoder 11 is a circuit to select the word line WL depending on an address signal and generates a selection signal from the program voltage VppH supplied from a voltage setting circuit 15. A column control circuit 12 generates a first and a second signals to be selectively impressed to the bit line BL from the program voltage VppL or VR supplied from the voltage setting circuit 15.</p>
申请公布号 JPH11260085(A) 申请公布日期 1999.09.24
申请号 JP19980059476 申请日期 1998.03.11
申请人 NEC CORP 发明人 OBATA HIROYUKI
分类号 G11C16/06;G11C16/04;G11C16/10;G11C16/30;(IPC1-7):G11C16/06 主分类号 G11C16/06
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