| 摘要 |
PROBLEM TO BE SOLVED: To obtain an interpolation processing unit by which a periodic error due to interpolation arithmetic operation is reduced. SOLUTION: The interpolation processing unit is provide with an interpolation arithmetic circuit 1 that uses plural input values to generate a new arithmetic output value, a same level detection circuit 2 that detects that plural input values are identical, and an output selection switch 3 that outputs an arithmetic output value when the same level detection means detects that plural input values are not identical or output any of the plural input values when the same level detection means detects that plural input values are identical. Thus, repeated error by interpolation arithmetic operation at the same input is reduced. |
