Processor having real-time external instruction insertion for debug functions without a debug monitor

摘要

A processor (16) is disclosed that has real-time external instruction insertion for debug functions. The processor (16) includes processor circuitry operable to execute embedded code (19) and debug circuitry interfacing with the processor circuitry that is operable to communicate with a debug host (12). The processor circuitry includes execution control logic (60) operable to select instructions for processor decode (62) and execution by the processor circuitry. The debug circuitry includes a register (30) connected to the execution control logic (60) as a source of instructions. The execution control logic (60) has an arbitration scheme for selecting between the register (30) in the debug circuitry and other instruction sources such that the register (30) in the debug circuitry allows external instruction insertion for execution by the processor circuitry. In one embodiment, the other instruction sources include a fetch queue (68), an interrupt register (64), and a pipeline protection register (66). Also in this embodiment, the arbitration scheme can allow debug instructions to be preemptive or non-preemptive. <IMAGE>