发明名称 Semiconductor device having wiring layers integrally formed with an interlayer connection plug and method of manufacturing the same
摘要 <p>To form an interconnection between an upper wiring layer 9 and a lower wiring layer 8 of a semiconductor device, a conductive material 7, 8, which may comprise more than one layer, but has uniform etching characteristics is deposited in a trench formed in an insulation film 3 that will insulate the upper wiring layer from the lower wiring layer. The lower wiring layer and the plug are etched form the deposited conductive material using a resist pattern. The wiring structure does not include an etching stopper at the boundary between the lower wiring layer and the plug.</p>
申请公布号 GB2330453(B) 申请公布日期 1999.09.22
申请号 GB19980011524 申请日期 1998.05.28
申请人 * MITSUBISHI DENKI KABUSHIKI KAISHA;* RYODEN SEMICONDUCTOR SYSTEM ENGINEERING CORPORATION 发明人 HIROYUKI * SHIMA
分类号 H01L21/768;H01L23/522;(IPC1-7):H01L21/768 主分类号 H01L21/768
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