发明名称 Boolean digital multiplier
摘要 A boolean multiplier is disclosed. The boolean multiplier includes a plurality of input buffers for storing a first operand and a second operand. The multiplier also includes a first set of gates coupled to the input buffers, the first set of gates respectively combining the first operand and the second operand with Boolean function to produce logical products. The multiplier further includes a second set of gates coupled to the first set of gates, the second set of gates respectively combining the logical products with Boolean functions to produce specific product bits.
申请公布号 US5956265(A) 申请公布日期 1999.09.21
申请号 US19970863588 申请日期 1997.05.27
申请人 LEWIS, JAMES M. 发明人 LEWIS, JAMES M.
分类号 G06F7/52;(IPC1-7):G06F7/52 主分类号 G06F7/52
代理机构 代理人
主权项
地址