Semiconductor memory device capable of setting substrate voltage shallow in disturb test mode and self refresh mode

摘要

A switching circuit is provided which activates a shallow level detector and inactivates a deep level detector when a disturb test signal or a self refresh signal is activated. Accordingly, a shallow substrate voltage at the same level as a detection level of the shallow level detector can be generated by a substrate voltage generating circuit not only in a disturb test mode but also in a self refresh mode. As a result, the area penalty due to the shallow level detector is reduced.