发明名称 |
Process for producing multi-level metallization in an integrated circuit |
摘要 |
A method for fabricating a multi-level integrated circuit is disclosed which utilizes a grid pattern from which portions corresponding to the metal layer are selectively removed to form a mask which is subsequently used to deposit dummy features in the open areas between metal lines, thereby to allow the deposition of a substantially planar dielectric surface over the metal layers and dummy features.
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申请公布号 |
US5956618(A) |
申请公布日期 |
1999.09.21 |
申请号 |
US19970828155 |
申请日期 |
1997.03.27 |
申请人 |
LUCENT TECHNOLOGIES INC. |
发明人 |
LIU, CHUN-TING;LEE, KUO-HUA;LIU, RUICHEN |
分类号 |
H01L21/3205;H01L21/768;H01L23/52;(IPC1-7):H01L21/027;H01L21/304 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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