| 摘要 |
<p>PURPOSE:To obtain the pulse signal generating circuit which sufficiently remove a shift in phase due to phase modulation imposed on an input clock signal. CONSTITUTION:This circuit is provided with a modulated signal detecting circuit 3 which extracts a phase-modulated component from a phase-modulated input clock signal A and a delay circuit 4 which delays the input signal A by the time of the extraction of the phasemodulated component from the input clock signal A by the modulated signal detecting circuit 3. A voltage comparing circuit 5 once inputting a modulation output signal B from the modulated signal detecting circuit 3 and a clock delay output signal A' from the delay circuit 4 generates two different logical levels according to the voltage difference obtained by subtracting the voltage value of the modulation output signal B from the voltage value of the clock delay output signal A' and also generates and outputs a pulse rectangular wave signal C after the phase shift regarding the input clock signal A is removed according to those two logical levels to an output terminal 2.</p> |
