| 摘要 |
A difference capture circuit for determining the duration of a digital signal pulse. The difference circuit includes a branch couplable to a standard counter for activating the counter to count as a function of a system clock pulse, and a triggering circuit couplable to a standard capture register for fetching the count from the counter. The difference capture circuit may be incorporated into standard timer unit circuitry and is designed to calculate the difference between either the rise and fall times for an incoming signal, or the rise to rise time of that signal. Adding the difference capture circuit to a timing unit eliminates the need to use RAM, and minimizes processor resources, in obtaining the timing associated with a signal change. |
