Definition of a pipelining memory stage by generating a delayed transition detection pulse,申请号EP19980302364-传众专利搜索

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发明名称	Definition of a pipelining memory stage by generating a delayed transition detection pulse
摘要
申请公布号	EP0867883(A3)	申请公布日期	1999.09.15
申请号	EP19980302364	申请日期	1998.03.27
申请人	SIEMENS AKTIENGESELLSCHAFT;KABUSHIKI KAISHA TOSHIBA	发明人	POECHMUELLER, PETER;WATANABE, YOHJI
分类号	G11C11/407;G11C7/10;G11C11/401;(IPC1-7):G11C7/00	主分类号	G11C11/407
代理机构		代理人
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