Via formation in polymeric materials

摘要

A semiconductor device and process for making the same are disclosed which use organic-containing materials to reduce capacitance between conductors, while allowing conventional photolithography and metal techniques and materials to be used in fabrication. In one structure, patterned conductors 18 are provided on an interlayer dielectric 10, with an inorganic substrate encapsulation layer 32 deposited conformally over this structure. A layer of an organic-containing dielectric material 22 (pure parylene, for example) is then deposited to substantially fill the gaps between and also cover the conductors. An inorganic cap layer 24 of a material such as SiO2 is deposited, followed by a photolithography step to define via locations. Vias are etched through the cap layer, and then through the organic-containing dielectric (this step may also be used to strip the photoresist). An inorganic via passivating layer 30 is conformally deposited and then anisotropically etched to clear the bottom of the vias while leaving a passivating liner in the via, preventing the via metal from contacting organic-containing material. A second application of these steps forms a second, overlying structure of patterned conductors 38, inorganic encapsulating layer 36, organic-containing dielectric layer 40, and inorganic cap layer 42.