Debugging method for a microcomputer

摘要

A computer system comprising a microprocessor on a single integrated circuit chip connected to an external computer device; the integrated circuit chip having: an on-chip CPU with a plurality of registers; a communication bus for addressing a plurality of devices assigned to a single memory address space of the CPU and providing a parallel communication path between the CPU and a first memory local to the CPU; an address memory for storing the assignment of addresses to the plurality of devices; and an external communication port connected to the communication bus, the port having an internal connection to the bus of an internal parallel signal format and an external connection to the external computer device of an external format less parallel than the said internal format, the port forming part of the memory address space of the CPU from which instructions may be fetched, whereby the port may be addressed by execution of an instruction by the CPU; the external computer device having a second memory local to the external computer device, which is accessible by the CPU through the port; and the computer system having address diversion means for reconfiguring the memory address space of the CPU so as to assign to the port memory addresses of another one of the devices. <IMAGE>