| 摘要 |
There is provided a code division multiple access apparatus which is capable of high-speed synchronization, is simple in construction and, moreover, achieves reduced consumption of electric power during standby. When a specific pattern contained in a signal received by a receiving antenna is detected by a SAW matched filter, a correlation peak is output from the filter. A chip synchronization signal generating circuit detects the correlation peak thereof and generates a synchronization signal at the time when a set time has elapsed from the detection time. An orthogonal PN code generator generates a predetermined orthogonal PN code in accordance with the synchronization signal. Further, a carrier generator generates a carrier on the basis of the output of the SAW matched filter. This generated carrier is modulated by the output of the orthogonal PN code generator. Then, the signal received by the receiving antenna is multiplied together with the modulation output by a multiplier, integrated by an integrator and returned to its original signal. <IMAGE> |
