发明名称 Shallow trench isolation with thin nitride as gate dielectric
摘要 A semiconductor structure comprises a silicon substrate of a first conductivity type including wells of a second conductivity type disposed on a surface thereof and a dielectric layer including silicon nitride disposed on the surface. The dielectric layer includes openings at least partially disposed on the p-wells. The dielectric layer also includes a top layer comprising silicon dioxide having a thickness of less than ten angstroms. Trenches having a depth comparable to or greater than a depth of the wells extend into the substrate surface within the openings. A nonconductive material is disposed within the trenches and has an upper surface that is substantially coplanar with the dielectric layer. Portions of the dielectric layer are used as gate dielectrics for transistors.
申请公布号 US5952707(A) 申请公布日期 1999.09.14
申请号 US19970986271 申请日期 1997.12.05
申请人 STMICROELECTRONICS, INC. 发明人 HODGES, ROBERT LOUIS
分类号 H01L21/28;H01L21/762;H01L29/51;(IPC1-7):H01L29/51 主分类号 H01L21/28
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