发明名称 |
Integrated circuit memory devices having cross-coupled isolation gate controllers which provide simultaneous reading and writing capability to multiple memory arrays |
摘要 |
Preferred integrated circuit memory devices have the capability of connecting a sense amplifier to multiple arrays of memory one-at-a-time or simultaneously, in response to first and second control signals, respectively. These memory devices include first and second memory arrays which have first and second pairs of differential input/output lines electrically coupled thereto, respectively. A sense amplifier is also provided having first and second pairs of differential input/output lines. To provide independent or simultaneous access to the first and second memory arrays by the sense amplifier, preferred isolation and equalization circuits are provided. With these circuits, a first electrical connection can be formed between the first pairs of differential input/output lines of the first memory array and the sense amplifier and a second electrical connection can be simultaneously formed between the second pairs of differential input/outlput lines of the second memory array and the sense amplifier, when a control signal line is in a first logic state (e.g., logic 0). These preferred isolation and equalization circuits also preclude simultaneous formation of the first and second electrical connections when the control signal line is in a second logic state (e.g., logic 1).
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申请公布号 |
US5953259(A) |
申请公布日期 |
1999.09.14 |
申请号 |
US19980103985 |
申请日期 |
1998.06.24 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
YOON, SEI-SEUNG;KIM, GI-HONG |
分类号 |
G11C11/401;G11C8/16;G11C11/409;H01L27/10;(IPC1-7):G11C16/04 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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