发明名称 |
SRAM cell with no PN junction between driver and load transistors and method of manufacturing the same |
摘要 |
SRAM memory cells is provided with high resistance to soft error and no parasitic capacitance due to PN junction. SRAM memory cells comprises the load resister is a thin film transistor having a same conductive type as that of the driver transistor.
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申请公布号 |
US5952678(A) |
申请公布日期 |
1999.09.14 |
申请号 |
US19970821144 |
申请日期 |
1997.03.20 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
ASHIDA, MOTOI |
分类号 |
H01L21/8244;H01L27/11;H01L29/786;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/8244 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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