发明名称 Method for forming low-voltage CMOS transistors with a thin layer of gate oxide and high-voltage CMOS transistors with a thick layer of gate oxide
摘要 The low-voltage, e.g., 2.5-volt, transistors that support the logic operations of a CMOS device are formed to have a thin layer of gate oxide, while the high-voltage, e.g., 3.3 or 5-volt, transistors that support the analog operations of the device are formed to have a thick layer of gate oxide in a cost-effective process flow that requires only one additional masking step over a conventional double-poly CMOS process.
申请公布号 US5953599(A) 申请公布日期 1999.09.14
申请号 US19970873822 申请日期 1997.06.12
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 EL-DIWANY, MONIR
分类号 H01L21/8238;(IPC1-7):H01L21/823;H01L21/823 主分类号 H01L21/8238
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