发明名称 |
Method of etching polysilicon layer |
摘要 |
A highly reliable semiconductor IC circuit can be produced by this etching method: A resist layer is formed on a polysilicon layer which is formed on a silicon dioxide layer on a silicon substrate. The resist layer is used as a mask, and silicon oxide layer deposits thereon while polysilicon layer is being etched. Carbon emission out of the resist layer is thus restrained, and thereby a selectivity, an etching speed ratio of polysilicon layer vs. silicon dioxide layer, is substantially raised.
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申请公布号 |
US5951879(A) |
申请公布日期 |
1999.09.14 |
申请号 |
US19960631003 |
申请日期 |
1996.04.12 |
申请人 |
MATSUSHITA ELECTRONICS CORPORATION |
发明人 |
MIYAMOTO, KYOKO;NAKAGAWA, SATOSHI |
分类号 |
H05H1/46;C23F4/00;H01L21/302;H01L21/3065;H01L21/3213;H01L29/78;(IPC1-7):H01L2/302 |
主分类号 |
H05H1/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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