发明名称 Programmierbare Gatteranordnung
摘要 A field programmable gate array, comprises: a plurality of circuit blocks each having logic circuits; at least one spare circuit block having logic circuits; a set of interconnections including at least one interconnection for connecting at least one of the circuit blocks and the at least one spare circuit programably; and at least one connecting element disposed on the interconnection of the set of interconnections which turns its status from a turned-on state to a turned-off state or vice versa when programmed. When any one of the circuit blocks is defective, since the defective circuit block can be replaced with the spare circuit block, it is possible to retain any desired functions of the logic circuits by programming the connecting means, thus improving the production yield of the field programmable gate array and thereby reducing the manufacturing cost thereof. <IMAGE>
申请公布号 DE69325872(D1) 申请公布日期 1999.09.09
申请号 DE1993625872 申请日期 1993.11.02
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NOGAMI, KAZUTAKA;SAKURAI, TAKAYASU;HATORI, FUMITOSHI
分类号 H01L21/82;G06F11/20;H01L27/118;(IPC1-7):G06F11/20 主分类号 H01L21/82
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